Assured Signal Integrity in stacked, high-speed DDR4 and DDR5 memory

Edge processing architectures in today’s autonomous and AI military systems, process an ever growing amount of sensor data. Many of these systems or devices used for edge processing applications in forward-deployed environments need to be small, rugged and agile.  To handle this extreme workload, system architects must design boards using the fastest field-programmable gate array (FPGA) devices and multicore processors. These devices cannot provide peak performance without massive amounts of high-speed DDR4 memory for resident data and real-time execution.  Faced with additional challenges, the system architect must design these systems to meet the size, weight and power (SWaP) constraints of smaller, more agile edge processing platforms integral to our warfighters’ mission success.   To support the system requirements, each embedded board within the system could need a minimum of 64GB of memory per processor, equating to more than 128 separate commercial-grade memory devices or multiple dual inline memory modules (DIMM), for layout on a printed circuit board. This is not a feasible solution for the embedded boards at the core of ultra-compact edge processing architectures in military systems operating in harsh, forward-deployed environments. Instead, high-density, military-grade memory manufactured with state-of-the-art 3D packaging technology must be utilized for space and power savings, while maintaining reliability in harsh environments. 

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DDR4 -SWaP for Military Embedded Systems

Don’t believe what they say… Size DOES matter!

Don’t believe what they say…Size DOES Matter!

In this case the smaller the better – especially in the constrained spaces of an aircraft cockpit or an unmanned vehicle where every inch is precious real estate needed for additional functionality, including massive amounts of sensor processing. These applications require the latest field-programmable gate array (FPGAs), graphics processing units (GPUs), and Intel Xeon processors with the support of high-speed dense memory to ensure peak performance with extremely low latency for mission success.

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