RF Engineers Co-op Program

The Next Generation of RF Engineers

Along with the warm weather and long days, summer means a new group of co-ops. Here at Mercury Systems, where innovation drives each subsequent generation of new products, we depend on our high-performing engineering teams, and one critical element behind developing these teams is our co-op program.

When it comes to RF, there is so much theory to learn in school that there is often less opportunity to apply that theory to specific RF/microwave design challenges. Spending a summer working through actual designs and troubleshooting in the lab kicks off the process of developing the intuition and experience critical to becoming a successful engineer. At Mercury we take that one step further by putting co-ops to work on real projects where their contributions make a measurable impact on the final product.

Read More

OpenVpx Switch backplane

Supported Switched/Mesh Fabrics by Mercury Systems – Part 1

The SMP Engineering group at Mercury Systems has worked tirelessly on development and innovation to offer our customers multiple choices for their present and future needs. Since authoring the OpenVPX™ (VITA 65) standard, it has opened the door to customers seeking answers and/or solutions to many of the issues they encounter when designing their systems. First, let’s take a look at what OpenVPX offers us.

OpenVPX builds on the module-centric VPX specifications by providing a nomenclature of planes and profiles to enable system integrators, module designers, and backplane providers to effectively describe and define aspects and characteristics of a system. OpenVPX addresses major system interoperability issues while allowing for flexibility within the system, as enabled by its planes and flexible module profiles featuring user-defined I/O. By following a system-centric approach and defining a number of standard system topologies, OpenVPX enables interoperable off-the-shelf modules and development platforms within the VPX marketplace. The standard has provisions for both 6U and 3U platforms, and high speed serial switched fabric technologies such as PCIE, RapidIO, Infiniband, 10 Gigabit and 40 Gigabit Ethernet.

OpenVPX profiles make it easy to build development systems with compatible components. Deployable systems will always have system issues that need to be addressed, such as I/O, custom backplanes, power, and cooling. SMP engineers not only understand these issues, we have also solved both integration and system-level problems and delivered integrated system solutions to our customers.

OpenVPX Benefits

  • Promotes interoperability and vendor choice
  • Provides specific design profiles that vendors can design to and integrators can specify as requirements
  • Reduces integration issues resulting in faster development & deployment time
  • Higher board volumes –> Economies of scale
  • Industry leading bandwidth and density
  • Higher velocity of technology upgrades
  • Will support higher backplane signaling speeds as technology matures

Now let’s look at the switched fabrics and their supported backplane topologies with OpenVPX platforms.

Types of Backplane Topologies

  • Centralized switching
  • A set of peer payload boards connected by switch fabric boards
  • Single or dual star topology for multiple path routing and potential redundancy
  • Provides system management function
  • Mesh Fabric
  • A set of peer payload cards connected in a full or partial mesh
  • Useful for small slot count systems as it avoids dedicated switch slots
  • Larger slot count systems require switching logic on each payload card
  • Host / slave
  • Typically comprise a master host board with several slave boards linked by PCIe
  • Allows an SBC to have greatly expanded capabilities without complexity of a general switching fabric

Planes and Profiles

Planes: Multiple levels of communication; Bottom to top

  • Utility Plane – Power pins and various utility signals
    • NVMRO (Non-Volatile Memory Read Only)
    • SYS_CLK (System Clock), REF_CLK (Reference Clock), AUX_CLK (Auxiliary Clock)
    • SYSRESET (System reset, including “maskable reset”), POWER
  • Management Plane (mp)
    • Low-power
    • Defined by VITA 46.0 and 46.11
    • Prognosticates/diagnoses problems
    • Can control module power
    • IPMC
  • Control Plane (cp)
    • Reliable, packet-based communication that carries information necessary to establish and control the network
    • Application control, exploitation data
    • Typically Gigabit Ethernet or less
  • Data Plane (dp)
    • High-throughput, predictable data movement without interfering with other traffic
    • Examples: Serial RapidIO, PCI Express, CX3(Connect-3), Infiniband, Ethernet: 10GB or 40GB, Infiniband: 56 GB
  • Expansion Plane (ep)
    • Tightly coupled groups of boards and I/O
    • Typically VME bridging or PCI Express

Profiles: Three types

  • Slot Profile
    • A physical mapping of ports onto a slot’s backplane connectors
    • Uses notions of pipes and planes:
      • The term “pipe” is used to define the number of bidirectional differential serial pairs that are grouped together to form a logical data channel.
    • Does not specify actual protocols conveyed over the backplane
  • Backplane Profile
    • A physical specification of a backplane
    • Specifies the number and type of slot profiles
    • Defines the topology of channels and buses that interconnect the slots
  • Module Profile
    • Extends a slot profile by mapping protocols to a module’s ports
    • Includes thermal, power and mechanical requirements
    • Provides a first order check of compatibility between modules

Next time we will dive deeper into what capabilities are available, how the systems can match your needs, and where Mercury Systems can assist its customers.

Lessons in RF Manufacturing from a Chicago Sausage Factory

People often say RF is black magic and it sometimes feels that way. I remember one evening I was called down to the production floor to help troubleshoot a technical problem found during swing shift. There was a product going through final test and it would only pass if held at a certain angle. At first I was doubtful that this was the case, but I held it in my hands, watched the performance on the network analyzer, rotated the unit, and saw the performance degrade. First we suspected the VNA cables, but a golden unit was solid regardless of its orientation. Then we performed the standard “shake while listening for something rattling test” but couldn’t hear anything—plus the repeatability seemed to suggest it wasn’t due to FOD. X-ray imaging didn’t yield any clues. Eventually, we had to send it off to de-lid, found nothing wrong, and after real-seal the performance was stable. The best theory we had was that the problem was due to flux improperly cleaned from a feedthrough.

It was this type of problem that drew me to RF engineering in college. Circuits that only worked when you placed a finger in a certain spot. The gain reduced by the microscope light. While it felt like black magic we all knew that in reality it was physics too complicated to be fully modeled. To this day, I still find these problems fun until all of a sudden a revenue commitment is missed.

Read More

Modular RF Architectures

Let’s start with the traditional approach. After spending the morning helping production with some tuning on an amplifier, you finally start reading through the 120-page RFP, SCD, and SOW for the new up-converter. At the end of the source control drawing there is an oddly shaped mechanical outline. The control signal is routed through a hermetic mico-D connector with a custom defined pin-out. While not ideal, the locations of the RF ports are manageable. The eight-month timeline to CDR appears reasonable. However, six months in and it becomes clear that it will take longer and cost more than anticipated. The back and forth iterations with the engineer supporting the custom designed digital control board seem to go on forever. The engineer working on the output module determines that she will need a new heat-sink to keep the devices from becoming too hot. The mixer is generating a spur that wasn’t predicted and somewhere a gain stage is oscillating. The frustrated program manager has to add this project to the long list of development jobs with irate customers.

Read More